BiSS C protocol support
What is BiSS C?
Renishaw supports BiSS C (unidirectional) open protocol for absolute encoders. BiSS is a high-speed serial protocol, perfect for dynamic axes that require high acceleration, silky-smooth velocity control, excellent bi-directional repeatability and rock-solid positional stability.
RESOLUTE™ with BiSS is available in both linear and rotary (angle) encoder versions, compatible with a wide range of industry-standard controllers, drives, DROs and PC counter cards.
Propietary protocol options for RESOLUTE absolute encoders are also available.
For BiSS technical support
About RESOLUTE encoders
Renishaw RESOLUTE BiSS encoders use the C-mode (unidirectional) BiSS serial protocol.
• Rotary encoders are single-turn (with 2n counts per revolution and no revolution counting).
• Linear encoders are available with a range of different resolutions (and maximum measuring lengths) as specified on the product data sheet.
Description of the BiSS interface
BiSS C-mode (unidirectional) is a fast synchronous serial interface for acquiring position data from an encoder.
It is a master-slave interface. The master controls the timing of position acquisition and the data transmission speed,
and the encoder is the slave. The interface consists of two unidirectional differential pairs of lines:
• “MA” transmits position acquisition requests and timing information (clock) from master to encoder
• “SLO” transfers position data from encoder to master, synchronised to MA.
The diagram below shows the data transmitted.
A typical request cycle proceeds as follows:
1. When idle, the master holds MA high. The encoder indicates it is ready by holding SLO high.
2. The master requests position acquisition by starting to transmit clock pulses on MA.
3. The encoder responds by setting SLO low on the second rising edge on MA.
4. After the “Ack” period is complete, the encoder transmits data to the master synchronised with the clock as shown in the diagrams above.
5. When all data has been transferred, the master stops the clock and sets MA high.
6. If the encoder is not yet ready for the next request cycle, it sets SLO low (the Timeout period).
7. When the encoder is ready for the next request cycle, it indicates this to the master by setting SLO high.